MRAMs have been widely investigated and used as nonvolatile memory devices that can be operated at low voltage and at high speed. In an MRAM cell, data is stored in a magnetic resistor that includes a Magnetic Tunnel Junction (MTJ) having first and second ferromagnetic layers and a tunneling insulation layer therebetween. In some embodiments, the magnetic polarization of the first ferromagnetic layer, also referred to as a free layer, is changed utilizing a magnetic field that crosses the MTJ. The magnetic field may be induced by an electric current passing around the MTJ, and the magnetic polarization of the free layer can be parallel or anti-parallel to the magnetic polarization of the second ferromagnetic layer, also referred to as a pinned layer. According to spintronics based on quantum mechanics, a tunneling current passing through the MTJ in the parallel direction may be greater than that in the anti-parallel direction. Thus, the magnetic polarizations of the free layer and the pinned layer can define the electrical resistance of the magnetic resistor, to provide an indication of the stored information in the MRAM.
An MRAM device is described in the publication to Durlam et al. entitled A Low Power 1 Mbit MRAM Based on 1T1MTJ Bit Cell Integrated With Copper Interconnects, 2002 Symposium on VLSI Circuits Digest of Technical Papers, pp. 158-161. FIG. 7 of the Durlam et al. publication, reproduced herein as FIG. 1, illustrates the MRAM memory core block with mid-point reference generator circuitry. FIG. 6 of Durlam et al., reproduced herein as FIG. 2, graphically illustrates measured minimum, maximum and middle resistance and calculated middle resistance curves versus bias for a midpoint generator reference cell.
Another midpoint reference generator for an MRAM device is described in U.S. Pat. No. 6,445,612 to Naji, entitled MRAM With Midpoint Generator Reference and Method for Read out. As noted in the abstract of this patent, the MRAM architecture includes a data column of memory cells and a reference column, including a midpoint generator, positioned adjacent the data column on a substrate. The memory cells and the midpoint generator include similar magnetoresistive memory elements, e.g. MTJ elements. The MTJ elements of the generator are each set to one of Rmax and Rmin and connected together to provide a total resistance of a midpoint between Rmax and Rmin. A differential read-out circuit is coupled to the data column and to the reference column for differentially comparing a data voltage to a reference voltage.
Another midpoint reference generator for an MRAM device is described in U.S. Pat. No. 6,055,178 to Naji, entitled Magnetic Random Access Memory With a Reference Memory Array. As described in this patent, An MRAM device includes a memory array and a reference memory array. The memory array arranges magnetic memory cells in rows and columns for storing information, and the reference memory array forms reference memory cells for holding a reference information in a row line. The magnetic memory cell has a maximum resistance and a minimum resistance according to magnetic states in the cell. Each reference memory cell has a magnetic memory cell and a transistor, which are coupled in series and have a reference resistance across the reference memory cell and the transistor. The transistor is controlled by a reference row line control, so as for the reference resistance to show a mid-value between the maximum resistance and the minimum resistance of the magnetic memory cell. A bit line current and a reference bit current are provided to the magnetic memory cell and the reference memory cell, respectively. Magnetic states alternates the bit line current, which is compared to the reference bit current to provide an output.
Other MRAM devices are described in U.S. Pat. No. 5,982,660 to Bhattacharyya et al. entitled Magnetic Memory Cell With Off-Axis Reference Layer Orientation for Improved Response, and U.S. Pat. No. 6,479,353 to Bhattacharyya entitled Reference Layer Structure in a Magnetic Storage Cell.